
//`define sim

module DDS_AD9767(
	clk	,	// 系统时钟50mhz
	rst_n	,
	key	,
	// 通道A
	data_A,
	clk_A	,
	WRTA	,
	// 通道B
	data_B,
	clk_B	,
	WRTB	
	);

	input 			clk	;
	input 			rst_n	;
	input 			key	;
	// 通道A
	output [13:0]	data_A;
	output 			clk_A	;
	output 			WRTA	;
	// 通道B
	output [13:0]	data_B;
	output 			clk_B	;
	output 			WRTB	;
	
	
	// 时钟125Mhz
	wire 				clk_125M;
	assign clk_A = clk_125M;
	assign WRTA  = clk_125M;
	assign clk_B = clk_125M;
	assign WRTB  = clk_125M;
	
	PLL_125	PLL_125_inst (
		.inclk0 ( clk ),
		.c0 	  ( clk_125M )
	);
	
	reg  [1:0]		model_selA,model_selB;
	reg  [31:0]		FwordA,FwordB			;
	reg  [11:0]		PwordA,PwordB			;
	
	DDS_model DDS_modelA(			// 通道A输出
		.clk			(clk_125M	), 
		.rst_n		(rst_n		),
		.key			(key			),
		.model_sel	(model_selA	),
		.Fword		(FwordA		),
		.Pword		(PwordA		),
		.data			(data_A		)
	);

	DDS_model DDS_modelB(			// 通道B输出
		.clk			(clk_125M	), 
		.rst_n		(rst_n		),
		.key			(key			),
		.model_sel	(model_selB	),
		.Fword		(FwordB		),
		.Pword		(PwordB		),
		.data			(data_B		)
	);
	
/******************虚拟按键输入*************/
	wire CH_model_selA, CH_model_selB;
	wire CH_FwordA, CH_FwordB;
	wire CH_PwordA, CH_PwordB;
	// 通道A 模式选择 虚拟按键输入
	ISSP	ISSP_model_selA (	
		.probe (  ),
		.source ( CH_model_selA )
	);
	// 通道A 频率控制字 选择虚拟按键输入
	ISSP	ISSP_FwordA (	
		.probe (  ),
		.source ( CH_FwordA )
	);
	// 通道A 相位控制字 虚拟按键输入
	ISSP	ISSP_PwordA (	
		.probe (  ),
		.source ( CH_PwordA )
	);
	
	// 通道B 模式选择 虚拟按键输入
	ISSP	ISSP_model_selB (	
		.probe (  ),
		.source ( CH_model_selB )
	);
	// 通道B 频率控制字 选择虚拟按键输入
	ISSP	ISSP_FwordB (	
		.probe (  ),
		.source ( CH_FwordB )
	);
	// 通道B 相位控制字 虚拟按键输入
	ISSP	ISSP_PwordB (	
		.probe (  ),
		.source ( CH_PwordB )
	);

/******************虚拟按键，检测上升沿*************/
	// 打俩拍
	reg CH_model_selA_reg0, CH_model_selA_reg1;
	reg CH_model_selB_reg0, CH_model_selB_reg1;
	reg CH_FwordA_reg0, CH_FwordA_reg1;
	reg CH_FwordB_reg0, CH_FwordB_reg1;
	reg CH_PwordA_reg0, CH_PwordA_reg1;
	reg CH_PwordB_reg0, CH_PwordB_reg1;
	
	always @(posedge clk_125M) begin
		CH_model_selA_reg0 <= CH_model_selA;
		CH_model_selA_reg1 <= CH_model_selA_reg0;
	end
	
	always @(posedge clk_125M) begin
		CH_model_selB_reg0 <= CH_model_selB;
		CH_model_selB_reg1 <= CH_model_selB_reg0;
	end
	
	always @(posedge clk_125M) begin
		CH_FwordA_reg0 <= CH_FwordA;
		CH_FwordA_reg1 <= CH_FwordA_reg0;
	end
	
	always @(posedge clk_125M) begin
		CH_FwordB_reg0 <= CH_FwordB;
		CH_FwordB_reg1 <= CH_FwordB_reg0;
	end
	
	always @(posedge clk_125M) begin
		CH_PwordA_reg0 <= CH_PwordA;
		CH_PwordA_reg1 <= CH_PwordA_reg0;
	end
	
	always @(posedge clk_125M) begin
		CH_PwordB_reg0 <= CH_PwordB;
		CH_PwordB_reg1 <= CH_PwordB_reg0;
	end
	
	// 上升沿检测
	wire CH_model_selA_pos, CH_model_selB_pos;
	wire CH_FwordA_pos, CH_FwordB_pos;
	wire CH_PwordA_pos, CH_PwordB_pos;
	
	assign CH_model_selA_pos = (!CH_model_selA_reg1) & CH_model_selA_reg0;
	assign CH_model_selB_pos = (!CH_model_selB_reg1) & CH_model_selB_reg0;
	assign CH_FwordA_pos 	 = (!CH_FwordA_reg1) & CH_FwordA_reg0;
	assign CH_FwordB_pos 	 = (!CH_FwordB_reg1) & CH_FwordB_reg0;
	assign CH_PwordA_pos 	 = (!CH_PwordA_reg1) & CH_PwordA_reg0;
	assign CH_PwordB_pos 	 = (!CH_PwordB_reg1) & CH_PwordB_reg0;
	
/****************** 波形，频率控制字,相位控制字选择 *************/	
	reg [2:0] CH_FwordA_sel, CH_FwordB_sel;
	reg [2:0] CH_PwordA_sel, CH_PwordB_sel;
	// 通道A  波形选择
	always@(posedge clk_125M or negedge rst_n) begin
		if (!rst_n)
			model_selA <= 2'd0;
		else if (CH_model_selA_pos)
			model_selA <= model_selA + 1'd1;
		else 
			model_selA <= model_selA;
	end
	
	// 通道B  波形选择
	always@(posedge clk_125M or negedge rst_n) begin
		if (!rst_n)
			`ifdef sim		
				model_selB <= 2'd0; // 仿真时使用
			`else	
				model_selB <= 2'd0; // 板级验证使用
			`endif
		else if (CH_model_selB_pos)
			model_selB <= model_selB + 1'd1;
		else 
			model_selB <= model_selB;
	end
	
	// 通道A 频率控制字选择
	always@(posedge clk_125M or negedge rst_n) begin
		if (!rst_n)
			`ifdef sim		
				CH_FwordA_sel <= 3'd4; // 仿真时使用
			`else	
				CH_FwordA_sel <= 3'd0; // 板级验证使用
			`endif
		else if (CH_FwordA_pos)
			CH_FwordA_sel <= CH_FwordA_sel + 1'd1;
		else 
			CH_FwordA_sel <= CH_FwordA_sel;
	end
	
	always@(*) begin
		case(CH_FwordA_sel)   
            3'd0:FwordA = 32'd34;//2**32 / 125000000;     34.35  
            3'd1:FwordA = 32'd344;//2**32 / 12500000;
            3'd2:FwordA = 32'd3436;//2**32 / 1250000;
            3'd3:FwordA = 32'd34360;//2**32 / 125000;
            3'd4:FwordA = 32'd343597;//2**32 / 12500;
            3'd5:FwordA = 32'd3435974;//2**32 / 1250;
            3'd6:FwordA = 32'd34359738;//2**32 / 125;
            3'd7:FwordA = 32'd343597384;//2**32 / 12.5;
        endcase
	end

	// 通道B 频率控制字选择
	always@(posedge clk_125M or negedge rst_n) begin
		if (!rst_n)
			`ifdef sim		
				CH_FwordB_sel <= 3'd4; // 仿真时使用
			`else	
				CH_FwordB_sel <= 3'd0; // 板级验证使用
			`endif
		else if (CH_FwordB_pos)
			CH_FwordB_sel <= CH_FwordB_sel + 1'd1;
		else 
			CH_FwordB_sel <= CH_FwordB_sel;
	end
	
	always @ (*) begin
		case(CH_FwordB_sel)   
            3'd0:FwordB = 32'd34;//2**32 / 125000000;     34.35
            3'd1:FwordB = 32'd344;//2**32 / 12500000;
            3'd2:FwordB = 32'd3436;//2**32 / 1250000;
            3'd3:FwordB = 32'd34360;//2**32 / 125000;
            3'd4:FwordB = 32'd343597;//2**32 / 12500;
            3'd5:FwordB = 32'd3435974;//2**32 / 1250;
            3'd6:FwordB = 32'd34359738;//2**32 / 125;
            3'd7:FwordB = 32'd343597384;//2**32 / 12.5;
        endcase  
	end

	// 通道A 相位控制字选择
	always@(posedge clk_125M or negedge rst_n) begin
		if (!rst_n)
			`ifdef sim		
				CH_PwordA_sel <= 3'd0; // 仿真时使用
			`else	
				CH_PwordA_sel <= 3'd0; // 板级验证使用
			`endif
		else if (CH_PwordA_pos)
			CH_PwordA_sel <= CH_PwordA_sel + 1'd1;
		else 
			CH_PwordA_sel <= CH_PwordA_sel;
	end
	
	always @(*) begin
		case(CH_PwordA_sel)
            3'd0:PwordA = 12'd0;   //0
            3'd1:PwordA = 12'd341; //30
            3'd2:PwordA = 12'd683; //60
            3'd3:PwordA = 12'd1024; //90
            3'd4:PwordA = 12'd1707; //150
            3'd5:PwordA = 12'd2048; //180
            3'd6:PwordA = 12'd3072; //270
            3'd7:PwordA = 12'd3641; //320
		endcase
	end

	// 通道B 相位控制字选择
	always@(posedge clk_125M or negedge rst_n) begin
		if (!rst_n)
			CH_PwordB_sel <= 3'd0; // 板级验证使用
		else if (CH_PwordB_pos)
			CH_PwordB_sel <= CH_PwordB_sel + 1'd1;
		else 
			CH_PwordB_sel <= CH_PwordB_sel;
	end

	always @(*) begin
		case(CH_PwordB_sel)
            3'd0:PwordB = 12'd0;   //0
            3'd1:PwordB = 12'd341; //30
            3'd2:PwordB = 12'd683; //60
            3'd3:PwordB = 12'd1024; //90
            3'd4:PwordB = 12'd1707; //150
            3'd5:PwordB = 12'd2048; //180
            3'd6:PwordB = 12'd3072; //270
            3'd7:PwordB = 12'd3641; //320
      endcase
	end
	
endmodule 